1. Field of Invention
The present invention relates to nonvolatile memory array. More particularly, the present invention relates to nonvolatile memory array without a fuse.
2. Description of Related Art
Non-volatile memory devices, such as flash, include a floating gate to store electric charge and a charge input/output control unit. Flash can be used for Basic Input Output System (BIOS) of a computer, high-density non-volatile memory array can be applied to mass storage devices in a portable Terminal Server, digital camera and memory card of a computer. Non-volatile memory has a lot of advantages, such as quick operation time, low power consumption and durability. A chip probing process is taken to test if the non-volatile memory functions after the non-volatile memory is manufactured, and the broken cell must be repaired or separated to avoid affecting all of the non-volatile memory.
FIG. 1 is a schematic view of a conventional non-volatile memory array. A non-volatile memory array 100 includes a sense amplifier 101, metal fuses 103, bit lines 105, a first word line 111 and first memory cells 113. In the non-volatile memory array 100, each bit line 105 is electrically connected to the sense amplifier 101 through a metal fuse 103. First word lines 111 and bit lines 105 are interlaced to control the first memory cells 113. Because the structure of every bit line 105 is the same, the bit line 105a and the corresponding circuit on it are used as an example for explaining.
In FIG. 1, bit line 105a is electrically connected to the unit sense amplifier 117a through the metal fuse 103a. M word lines 111 and one bit line 105a control the m memory cells 113a. Memory cells 113a are used to store data and put the stored date on the bit line 105a. The metal fuses 103a are used to convey the signal from the bit line 105a to the sense amplifier 117a such that the sense amplifier 117 can amplify the signal from the bit line 105a. 
When the non-volatile memory is done, generally, there is a first wafer sort stage to test the combinational logic function evaluated by the bit line 105a. If the logic function of the bit line 105a fails, the laser repair machine will trim the metal fuse 103a by laser to disable the connection between bit line 105a and sense amplifier 117a. By doing so, the sole failed bit line 105a affecting the whole Non-volatile memory array 100 can be avoided.
However, additional processes will be needed if the laser trimming method is used. For example, after the failed bit line 105a is identified at the first wafer sort stage, an additional laser trimming step to trim the metal fuse open is needed, followed by an additional second wafer sort stage to test if the trimming works or not such that the whole non-volatile memory 100 can operation correctly. These additional steps make the whole test process more complicated.
For the forgoing reasons, there is a need for a new non-volatile structure that can disable the connection between the failed bit line and the sense amplifier without laser repair and second wafer sort stage to simplify the circuit test process.